Signals which are available at circuit board level may be monitored by logic state analyser equipment. Such logic state analyser equipment is capable of monitoring several hundred signals which might be available at the board level. Such signals may be part of the functionality, such as a memory bus, they may be signals created specifically for analysis at the board level, or they may be signals which have been brought out as external pin connections of a chip. A logic state analyser is capable of treating a particular pattern on a selected number of the signals being monitored as a trigger. It can then use this trigger to perform some action even if this is simply noting that the trigger has occurred. By allowing for several triggers, the logic state analyser is also capable of building up a complex sequence of trigger events at board level.
However the logic state analyser equipment is restricted to only monitoring board level signals and has no access to signals buried within chips.